Thursday, May 24, 2012

Walkin Interview @ Infotech Enterprises in Chennai on 26th & 27th May 2012 (Hitech - Embedded Software & ASIC)

Company : Infotech Enterprises Limited (www.infotech-enterprises.com)


Date : 26th & 27th May 2012 (Saturday & Sunday).   

Venue: Hotel Dee Cee Manor, #90, G.N. Chetty Road, T. Nagar, Chennai - 600 017. Ph.Nos.: 044 - 2815 8833 / 2815 8899 ,09246372722, 090088 55911, Walk-in Time: 10.00 AM to 2:00 PM.

A snapshot of our Hitech practice:

Ø  We have one of the largest ASIC design services teams.

Ø  14-year track record of first pass silicon success across 250+ ASIC tape outs

Ø  In-depth expertise on various EDA tool flows that positions us way ahead of the competition

Ø   A niche player in platform development based on Android, Linux, WinCE and other  embedded OS

Ø  Globally distributed design centers - San Jose, California (US), Hyderabad, Visakhapatnam & Bengaluru

EMBEDDED SOFTWARE REQUIREMENTS

IEL Embedded Software group is a leading service and solution provider for top 3 OEMs and topmost chipset vendors in the area of platform based services like Android/Windows/WinMobile. In addition, the group provides extensive services in connectivity and touch solutions space.

Job Location: Bengaluru

Qualification: BE/B.Tech. or ME/M.Tech. in ECE/EEE/CSE

Note: Job location and qualification remain the same for all Embedded Software positions.

VC++, MFC, Win32 (Job Code: MFC)

Experience: 3 - 8 years 

·         Experience using  VC++ with MFC and Win32, sound knowledge of OOPs concepts, multi-threading

·         Understanding of STL, Windows Sockets and .Net Technologies

Storage Filesystem (Job Code: SF)

Experience: 6 - 9 years

·         Sound knowledge of NAS, good programming skills in C, implemented file level protocols (NFS or  CIFS or SAMBA)

·         OS internals including multithreading, RPC, socket programming

·         Expertise in debugging tools such as Crash, gdb, kdb, dbx, log analysis

·         Sound knowledge of data structures and algorithm, experience with any source codecontrol system and any defect tracking system

·         Understanding of software development lifecycle and methodology (Waterfall or Agile)

LTE Physical Firmware/DSP (Job Code: LPF/DSP)

Experience: 3 - 8 years

·         Signal processing background with good understanding of OFDM, MIMO

·         Strong C, Embedded and real time programming, C/Assembly on DSPs/RISCs

·         Experience in Lab tools/Analyzers/Emulators

LTE MAC Firmware (Job Code: LMacF)

Experience: 3 - 7 years

·         Experience in L2 (MAC) firmware, hands-on working experience in C/assembly

·         Upper MAC, lower MAC, LTE experience preferred

·         Linux internals such as device drivers, networking interfaces, QoS and the TCP/IP stack

·         Experience in Lab tools/Analyzers/Emulators

·         Experience in embedded systems/microcontroller

·         Signal processing understanding, concept of OFDM, MIMO

Android Multimedia frameworks (Job Code: Android MF)

Experience: 3 - 7 years

·         Strong knowledge of C/C++

·         Good understanding of multimedia fundamentals

·         Hands-on experience in Linux/Android multimedia framework ± Opencore/Openmax/Stagefright on HW platforms/SOCs

·         Expertise in any of the following:

                -  Pre/Post Processing/Algorithms: Video surveillance, Video Analytics, IP camera segment

                -  Microsoft DirectShow or SGX/OpenGL/ES, familiarity with multimedia encoders and decoders would be an added advantage

BSP–Linux Device Driver (Job Code: BSP Linux)

Experience: 3 - 7 years

·         Proficiency in C/C++ and assembly programming skills

·         Good understanding of processor (ARM, MIPS, x86) and overall system architecture

·         Good understanding of OS internals and mobile platform SW (Linux/WinCE/Android)

·         Well versed in any of the following driver development experience on Linux/Android/WinCE OS

·         Firmware and device driver development for mobile and set top box based platforms (PM, Connectivity/MM devices/Memory Devices/HID/Bus devices ± USB/PCI etc)

·         Developing Board Support Package (BSP), boot loaders, OS porting and bring up on SDPs

Wi-Fi (Job Code: Wi-Fi)

Experience: 3 - 7 years

·         Proficiency in C/C++ and assembly programming skills

·         Expertise on any mobile OS±Linux/Android/WinCE/WinMobile, good knowledge of  connectivity buses - SDIO/SPI/PCI/USB

·         Strong working and testing knowledge with IEEE802.11 a/b/g/n, Wi-Fi Protocol

·         Experience working with Wi-Fi and networking drivers and TCP/IP in general

·         Experience with Wi-Fi Display and Wi-Fi Direct related technologies

·         Exposure to Wi-Fi forum certification, WiFi lab setup would be an added advantage

ASIC & FPGA REQUIREMENTS

IEL has one of the largest ASIC design services team working with top ASIC vendors as our clients. We have a track record of 14 years in ASIC design and handle designs upto 28nm.

ASIC/SoC Verification (Job Code: ASIC-Ver)

Experience: 3 - 10 years

·         Expertise in SystemVerilog& OVM/VMM/UVM

·         Expertise in e-Specman and eRM

·         Exposure to SoC verification ± C/ASM (ARM, MIPS, Tensilica)

·         Expertise in analog and mixed signal verification

·         Knowledge on AMBA AXI/AHB, OCP, PCIe, DDR2/3, GMII/XUAI, etc.

Job Location: Hyderabad, Bengaluru, Visakhapatnam & Delhi

Logic Design (Job Code: ASIC/FPGA-LD)

Experience: 4 - 7 years

Microarchitecture, Logic Design, RTL Coding, Logic Synthesis, expertise on ARM and Cortex processors and designing subsystems around them

Job Location: Hyderabad, Bengaluru & Delhi

ASIC Physical Design Engineers/Leads (Job Code: ASIC-PD)

Experience: 2 - 8 years 

Experience in partitioning, IO Ring Preparation, Floor Planning, PG Planning, Place and Route, Clock Tree Synthesis, Timing Closure, Static Timing Analysis, IR drop Analysis, Physical Verification, Signal Integrity, Low Power Design

Job Location: Hyderabad, Bengaluru, Visakhapatnam & Delhi

ASIC Physical Design Managers (Job Code: ASIC-PDM)

Experience: 8 - 14 years 

·         Should be able to manage a team of 10+ physical design engineers with expertise on Partitioning, IO ring preparation, Floorplanning, PG planning, Place and Route, Clock               Tree Synthesis, Timing Closure, Static Timing Analysis, IR drop analysis, Physical verification, Signal Integrity, Low Power Design

·         Experience should include managing multi-million gate hierarchical designs using deep submicron process technologies

Job Location: Hyderabad, Bengaluru & Visakhapatnam

ASIC Implementation (Job Code: ASIC-IMP)

Experience: 4 - 10 years

·         Experience in Logic Synthesis, Low Power Synthesis, Timing Constraints, Timing Closure, Static Timing  Analysis, Cross Talk Analysis & Repair, Formal Verification

Job Location: Hyderabad, Bengaluru & Visakhapatnam

ASIC Standard Cell/Memory/IO/Analog (Job Code: ASIC-Standard Cell/Memory/IO/Analog)

Experience: 2 - 5 years

·         Hands-on experience in layout design of Standard Cell/Memory/IO/Analog-

Job Location: Hyderabad, Bengaluru & Delhi

ASIC DFT (Job Code: ASIC-DFT)

Experience:  2 - 8 years

·         Expertise in scan, test compression, ATPG, LBIST, MBIST,JTAG, ATE equipment, test mode  timing, simulation, silicon debug

Job Location: Bengaluru, Hyderabad & Visakhapatnam

FPGA Positions:

FPGA Verification(Job Code: FPGA-VER)

Experience: 2 - 10 years (Tech lead/Senior Engineer/Junior Engineer)

·         Experience in ASIC/FPGA systems, verification & validation for Aerospace domain

·         Strong knowledge in DO254 process for Airborne Electronic Hardware development

·         Strong grasp in verification using System Verilog (OVM/UVM), Verilog or VHDL

·         Good communication skills, customer interaction and working experience in multicultural environment

Job Location: Bengaluru

FPGA System-Team Lead (Job Code: FPGA-SYS)

Experience: 5+ years

·         Experience in designing ASIC/FPGA based systems and platforms

·         Exceptional debug skills, system validation knowledge

·         Working knowledge with interfaces like DDR2/3, RGMII/GMII/XUAI, PCIe, SPI, I2C, etc.

·         Understanding of Android/Linux/Windows based systems

Job Location: Hyderabad & Bengaluru

FPGA Hardware-Team Lead (Job Code: FPGA-HW)

Experience:4 - 6 years 

·         Overall 4 to 6 years' experience with 3 to 4 years in RAIL domain electronics

·         FPGA based designs: Actel, ALTERA, XILINX and embedded HW testing

Job Location: Hyderabad

Qualification for all the above positions: BE/B.Tech or ME/M.Tech/MS in respective streams for Hitech ASIC & FPGA

Candidates who are unable to attend the drive can forward their resumes mentioning "Job Code & Years of Experience" in the Subject line to: Hitech -ASIC & FPGA requirements  :-  Praveen.Vemula@infotech-enterprises.com  & for Hitech – Embedded  Software requirements Srinivas.Dodla@infotech-enterprises.com


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